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ps 2.0 |
This macro computes the absolute value of the input register on an element by element basis.
One arithmetic instruction slot.
abs Dest0, Source0
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1.0 |
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1.1 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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Computes the absolute value of each element of Source0 and places the result in Dest0.
abs r4, r4
this macro is equivalent to the following code.
cmp Dest0, Source0, Source0, -Source0
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ps 1.0 – 2.0 |
Adds two source colors and places the sum into a third register.
One arithmetic instruction slot.
add Dest0, Source0, Source1
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1.4 Phase 1 |
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Adds the Source0 and Source1 registers and places the result in the Dest0 register.
add r0, r0, c2
add r0, r0, 1-r1
add r0, r0, t0_bias
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ps 1.4 |
Bump-Environment-Map. Apply a fake bump environment map
transform.
Two arithmetic instruction slots.
bem Dest0.rg, Source0, Source1
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Dest |
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1.1 |
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1.2 |
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1.3 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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This instruction takes two source registers, applies the 2x2 bump-map matrix to Source1, adds in Source0 and places the result in the destination register. This instruction only operates on the .rg components. The matrix values are set prior to the pixel shader through a SetTextureStage call setting the four D3DTSS_BUMPENVMATnn matrix elements. The destination register number determines the texture stage number. There are no restrictions on modifiers on the source registers. There are restrictions on using the bem instruction;
Note: This instruction works only in PS 1.4.
bem r3.rg, r0, c2 // bump texture 3 * c2, add in r0
bem r4.xy c2, r0 // bump texture 4 * r0, add in c2
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ps 1.2 - 2.0 |
Compare: Performs a conditional assignment based upon a comparison of the values in the source registers.
Two arithmetic slots for PS 1.2 & 1.3, One for PS 1.4
& 2.0
cmp Dest0, Source0, Source1, Source2
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1.1 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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If the value in Source 0 is greater-than or equal-to zero, then Source1 is placed in the destination; else Source2 is placed in the destination. This comparison is performed on an element-by-element basis. Dest0 must be a different register than any of the source registers.
Note: For PS 1.2-1.3 the source register can be any register, while the destination can be either a texture or a temporary registers. There can be a maximum of three cmp instruction is a pixel shader.
Bug: For PS 1.2 & 1.3, the destination register cannot be the same as a source register, but validation fails to catch this. The cmp instruction takes up two slots, but validation counts this as only one slot.

For PS 1.4 the source register can be temporary registers, constant registers, or vertex color registers for phase 2, while the source register can be temporary registers or constant registers for phase 1. The destination register must be a temporary register.
cmp r0, r1, c1, c2
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ps 1.1 – 1.4 |
Conditional: Performs a conditional assignment based upon a comparison of the value in r0.a (PS 1.1-1.3) or another register (PS1.4) with 0.5.
One arithmetic instruction slot.
cnd Dest0, Source0, Source1, Source2
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Dest |
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1.1 |
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r0.a |
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r0.a |
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r0.a |
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1.4 Phase 1 |
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Compares the value in r0.a against 0.5. Source0 must be r0.a for PS 1.1 – 1.3. If Source0 is greater than 0.5, then Dest0 is set to the value in Source1. If not, then Dest0 is set to the value in Source3.

For PS 1.4, the cnd instruction operates on an element-by-element basis.
You can also use this command to compare between two values with an added step as shown below
cnd r0, r0.a, c1, c2 // PS 1.1-PS 1.3
// to compare two values v0 and v1
sub r0, v0, v1_bias ; r0 = v0-(v1-0.5) = v0-v1+0.5
cnd r0, r0.a, c0, c1 ; if r0.a > 0.5 use c0, else c1
; thus v0-v1+0.5 > 0.5 = v0-v1 > 0 = v0 > v1
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ps 2.0 |
The three component cross product.
Two arithmetic instruction slots.
crs Dest0, Source0, Source1
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1.0 |
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1.1 |
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1.2 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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Computes the three component cross product using the right-hand rule. There cannot be ands swizzles on the source registers. Dest0 must have a write mask that is one of the following: .x, .y, .z, .xy, .xz, .yz, or .xyz. The destination register should be different from the source registers.
crs r1, v0, v3
this macro is equivalent to the following code sans write mask on Dest0.
mul Dest0, Source0.zxyw, Source1.yzxw
mad Dest0, Source0.yzxw, Source1.zxyw, -Dest0
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ps 2.0 |
Declare how a texture sampler register is to be used.
Takes no slots
dcl_<type>
Dest0
In order to make it easier to optimize and verify shaders PS 2.0 now requires a declaration statement on all sampler, color input, and texture coordinate registers. All sampler registers must be declared before use in the shader. Dest0 will be a specific input register. The <type> tag is an indicator of the type of texture this register is to be used with. The allowable types are; 2d, cube, and volume.
Color input and texture coordinate register must specify a mask of which components are used. Texture coordinate register may specify the partial precision (_pp) modifier.
Must appear before any arithmetic or texture instructions.
// sampler registers
dcl_2d s1 // s1 will be using a 2D texture
dcl_cube s2 // s2 will be using a cubemap
dcl_volume s3 // s3 will be using a 3D texture
// color and texture coordinate registers
dcl t1.rg
dcl_pp t2.rg
dcl v0.rgba
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ps 1.0 – 2.0 |
Defines the constants to be used in the shader.
Takes no slot or time.
def Const1, float1, float2, float3 float4
The first argument is the name of the constant – e.g. c0, c1, etc. The remaining arguments are the four floating-point values to be placed in the constant register in a, r, b, b order. The constants must be in the [-1,1] range. The constant are available one the shader is loaded, but a subsequent call to SetPixelShaderConstant() will overwrite any constant values previously set.
def c0, 0.0f, 0.0f, 0.0f, 0.0f
def c1, 1.0, 0.5, 0.25, 0.125
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ps 2.0 |
Two-component dot product plus a scalar add. Can be used to emulate the bem instruction.
One arithmetic instruction slot.
dp2add Dest0,
Source0, Source1, Source2
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PS Version |
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1.0 |
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1.1 |
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1.2 |
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1.3 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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Computes the two component dot product of the Source0 and Source1 (elements .r and .g) and add in a scalar value from Source2 (which must have a replicate swizzle). The results are replicated to all elements of the destination
p2add r0, v0, v1, c4.z
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ps 1.0 – 2.0 |
Three-component dot product (a.k.a. Dot-product three) of the color arguments, replicated to all channels of the output register.
One arithmetic instruction slot.
dp3 Dest0, Source0, Source1
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Computes the dot product of the Source0 and Source1 color registers and places the result in all channels of the Dest0 register. Only the r, g and b values are used to compute the dot product, the alpha component is ignored. The dp3 instruction does not clamp the results to the range [0,1]. If you want to clamp the results, use the _sat modifier. If a write-mask is used only the selected channels are written.
Note: Since the dp3 instruction is a vector operation it is always scheduled for the vector pipeline. Thus when used with instruction pairing it’s always got to be the vector operation. It can be co-issued if the dp3 is writing color channels while the other instruction is writing the alpha channel.
dp3 r0, t0, v2 ; rgba is set
dp3 r0.rgb, t0, v2 ; only rgb is set
dp3 r0.a, t0, v2 ; only a is set
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ps 1.2 – 2.0 |
Four-component dot product (a.k.a. Dot-product four) of the color arguments, replicated to all channels of the output register.
Two arithmetic instruction slots in PS 1.2 & 1.3, one slot in PS 1.4 & 2.0
dp4 Dest0, Source0, Source1
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Computes the dot product of the Source0 and Source1 color registers and places the result in all channels of the Dest0 register. The r, g, b, and a values are used to compute the dot product. The dp4 instruction does not clamp the results to the range [0,1]. If you want to clamp the results, use the _sat modifier. If a write-mask is used only the selected channels are written.
Note: This instruction cannot be co-issued with another instruction.
For PS 1.2 & 1.3: A maximum of four dp4’s are allowed in a single pixel shader.
Bugs PS 1.2 & 1.3: The destination register should not be the same as the source registers, and validation does not catch this. While this instruction takes two slots, it’s actually counted as taking one, so that it’s possible to overflow the instruction buffer.
dp4 r0, t0, v2 ; rgba is set
dp4 r0.rgb, t0, v2 ; only rgb is set
dp4 r0.a, t0, v2 ; only a is set
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ps 2.0 |
Computes the base two exponent of a scalar value.
One arithmetic instruction slot.
exp Dest0, Source0
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1.0 |
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2.0 |
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Computes 2Source0, where Source0 must have a replicate swizzle.
Setup:
Store the value you want the exponent of in an element of Source0. Use the replicate swizzle to select this element.
Results:
All elements of Dest0 will contain the exponential value.
exp r1, r2.y // replicate exp(r2.y) in r1
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ps 2.0 |
This instruction removes the integer part of the input register on an element-by-element basis.
One arithmetic instruction slot.
frc Dest0, Source0
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1.4 Phase 1 |
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2.0 |
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Takes the fractional parts of Source0’s elements and places them in Dest0’s elements on a per-element basis. The truncation used is Source0-floor(Source0), so the results are always positive, that is, any negative values in Source0 will result in the fraction necessary to subtract to reach the next integer < Source0. e.g. If Source0.x = -5.4, Dest0.x will equal 0.6.
Setup:
Store the value you want the fractional part of in Source0. Use may use a replicate swizzle.
Results:
Dest0 will contain the fractional values of Source0.
frc r6, r2
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ps 2.0 |
Compute the base two logarithm of a scalar.
One arithmetic instruction slot.
log Dest0, Source0
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2.0 |
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Computes the base two log of a Source0 element. You must us a replicate swizzle to select the element of Soruce0. Dest0 will be filled with the result. If the source value is zero, then the destination result will be MINUS_INFINITY. (Or at least a really big negative number)
log r0, r5.w // place log2(r5.w) in r0
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ps 1.0 – 2.0 |
Linear interpolation between two registers (a.k.a. “lerp”) using a fraction specified in a third register.
One arithmetic instruction slot.
add Dest0, Source0, Source1, Source2
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Source0 contains the fractional interpolant value. When Source0 is zero, Source2 is placed in the destination. When Source0 is one, Source1 is placed in the destination. Values in the [0-1] range interpolate between Source1 and Source2. If the value is outside the range [0,1] the result is indeterminate.
Note: You need to be careful that the value of the interpolant doesn’t exceed the [0,1] range. When computing the interpolant use the _sat modifier to clamp the value.
lrp r0, s0, s1, s2
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ps 2.0 |
Perform a 3 × 2 matrix multiply on a 3 element vector.
Two arithmetic instruction slots.
m3x2 Dest0, Source0, Source1
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PS Version |
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1.0 |
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1.4 Phase 1 |
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2.0 |
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Multiplies a 3 element vector by a 2 × 3 matrix. The result is stored in Dest0.xy. The next register from Source1 is implicitly used. Dest0 must not be the same as any source registers, both explicit and implicit.
You cannot use swizzle or negate modifiers on Source1.
m3x2 r1, r3, c4 // c5 use implicit
this macro is equivalent to the following code.
dp3 Dest0.x, Source0, Source1
dp3 Dest0.y, Source0, Source1+1
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ps 2.0 |
Perform a 3 × 3 matrix multiply on a 3 element vector.
Three arithmetic instruction slots.
m3x3 Dest0, Source0, Source1
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Destination |
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PS Version |
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1.0 |
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1.1 |
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1.2 |
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1.3 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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Multiplies a 3 element vector by a 3 × 3 matrix. The result is stored in Dest0.xyz. The next two registers from Source1 are implicitly used. Dest0 must not be the same as any source registers, both explicit and implicit.
You cannot use swizzle or negate modifiers on Source1.
m3x3 r1, r3, c4 // c5 and c6 use implicit
this macro is equivalent to the following code.
dp3 Dest0.x, Source0, Source1
dp3 Dest0.y, Source0, Source1+1
dp3 Dest0.z, Source0, Source1+2
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ps 2.0 |
Perform a 3 × 4 matrix multiply on a 3 element vector.
Four arithmetic instruction slots.
m3x4 Dest0, Source0, Source1
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Legal Register Arguments |
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Destination |
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PS Version |
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1.0 |
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1.1 |
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1.2 |
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1.3 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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Multiplies a 3 element vector by a 4 × 3 matrix. The result is stored in Dest0.xyzw. The next three registers from Source1 are implicitly used. Dest0 must not be the same as any source registers, both explicit and implicit.
You cannot use swizzle or negate modifiers on Source1.
m3x3 r1, r3, c4 // c5, c6, and c7 use implicit
this macro is equivalent to the following code.
dp3 Dest0.x, Source0, Source1
dp3 Dest0.y, Source0, Source1+1
dp3 Dest0.z, Source0, Source1+2
dp3 Dest0.w, Source0, Source1+3
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ps 2.0 |
Perform a 3 × 4 matrix multiply on a 4 element vector.
Three arithmetic instruction slots.
m4x3 Dest0, Source0, Source1
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Legal Register Arguments |
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Destination |
Source |
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PS Version |
v |
c |
t |
r |
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t |
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s |
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1.0 |
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1.1 |
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1.2 |
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1.3 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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Multiplies a 4 element vector by a 3 × 4 matrix. The result is stored in Dest0.xyz. The next two registers from Source1 are implicitly used. Dest0 must not be the same as any source registers, both explicit and implicit.
You cannot use swizzle or negate modifiers on Source1.
m4x3 r1, r3, c4 // c5 and c6 use implicit
this macro is equivalent to the following code.
dp4 Dest0.x, Source0, Source1
dp4 Dest0.y, Source0, Source1+1
dp4 Dest0.z, Source0, Source1+2
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ps 2.0 |
Perform a 4 × 4 matrix multiply on a 4 element vector.
Four arithmetic instruction slots.
m4x4 Dest0, Source0, Source1
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Legal Register Arguments |
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Destination |
Source |
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PS Version |
v |
c |
t |
r |
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t |
r |
s |
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1.0 |
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1.1 |
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1.2 |
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1.3 |
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1.4 Phase 1 |
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1.4 Phase 2 |
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2.0 |
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x |
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Multiplies a 4 element vector by a 4 × 4 matrix. The result is stored in Dest0.xyzw. The next three registers from Source1 are implicitly used. Dest0 must not be the same as any source registers, both explicit and implicit.
You cannot use swizzle or negate modifiers on Source1.
m4x3 r1, r3, c4 // c5, c6 and c7 use implicit
this macro is equivalent to the following code.
dp4 Dest0.x, Source0, Source1
dp4 Dest0.y, Source0, Source1+1
dp4 Dest0.z, Source0, Source1+2
dp4 Dest0.w, Source0, Source1+3
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ps 1.0 – 2.0 |
Multiply and Add. Multiplies two registers and then adds a
third to the result then stores the result in the destination.
One arithmetic instruction slot.
mad Dest0, Source0, Source1, Source2
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Legal Register Arguments |